Title:
MANUFACTURE OF MICROTIP FOR ELECTRON SOURCE AND MICROTIP FOR ELECTRON SOURCE THUS MANUFACTURED
Document Type and Number:
Japanese Patent JP3759195
Kind Code:
B2
Abstract:
PURPOSE: To improve the cathodic characteristic and the uniformity over the major surface of a microtip by subjecting it to the first cleaning process and the subsequent finishing process of surface etching.
CONSTITUTION: An Si substrate 6 has a cathode conductor 8 formed thereon, on which an insulating layer 12 is formed. The layer 12 is coated with an Nb grid 10a. The layer 12 is then subjected to reactive etching for the formation of a hole therethrough, in which a truncated conical Mo base 20 is formed on the layer 8. On the base 20 is formed through vapor deposition techniques a conical chip 22 of Mo, Cr, Si, Fe or Ni of the substantially same height as that H of the insulating base and beyond the grid 10a at the apex A. The chip is subjected to the first cleaning process of wet chemical cleaning techniques using a caustic alkali solution, followed by reactive ion etching using SF6 plasma, so as to have a diameter (d) smaller than that D of the base 20.
Inventors:
Robert Mayer
Pierre Vaudine
Philip Lambeau
Pierre Vaudine
Philip Lambeau
Application Number:
JP9888595A
Publication Date:
March 22, 2006
Filing Date:
April 24, 1995
Export Citation:
Assignee:
COMPAGNIE GENERALE DES MATIERES NUCLEAIRES
International Classes:
H01J9/02; H01J1/30; H01J1/304; H01J31/12; (IPC1-7): H01J9/02; H01J1/30; H01J31/12
Domestic Patent References:
| JP3225721A | ||||
| JP4355027A | ||||
| JP5021002A | ||||
| JP7111133A | ||||
| JP63279535A |
Attorney, Agent or Firm:
Masatake Shiga
Takashi Watanabe
Shigeo Naruse
Takashi Watanabe
Shigeo Naruse