MANUFACTURE OF PACKAGE FOR INTEGRATED CIRCUIT

Japanese Patent JP3040903

B2

PURPOSE: To prevent the generation of a flaw in the plated surfaces of lead pins and the generation of the peeling of a plating and to obtain a high-performance package of high quality by a method wherein an electroplating is applied to the lead pins via a jig for plating and the jig for plating is separated in the direction different from the axis direction of the lead pins.
CONSTITUTION: Each pin 13 of a package is set in such a way that it is set in roughly the center of each loose insertion hole 4 using holes 8 in a jig 1. Then, the pins 13 are pressed and held into the jig 1, the jig 1 is connected to an external power supply and an electro-plating is applied to the pins 13 in a plating solution tank with a prescribed plating solution housed therein. Then, the surfaces of the pins 13 of the package, an integrated circuit mounting part, bonding pad parts, a wiring pattern and the like are plated. Then, an external force is applied to each lead pin 13 in the lateral direction, the lead pin 13 is relatively moved from each press-fitting hole 5 to the side of each loose insertion hole 4 and after the external force is relaxed, the pin is pulled out. Thereby, a flaw in the plated surfaces of the pins and the peeling of the plating are prevented from being generated by the jig 1 to come into contact to the package, the corrosion resistance of the package is improved and at the same time, the generation of the defective appearance of the package can be prevented.

Takahiro Shibata
Futoshi Sonoda
Kazuo Kimura
Sato Tomio
Koichi Ishikawa

JP34622693A

May 15, 2000

December 21, 1993

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Nippon Special Ceramics Co., Ltd.

C25D7/00; H01L23/12; H01L23/50; (IPC1-7): H01L23/50; C25D7/00

JP513640A

Kazuhisa Kato

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