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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH03232238
Kind Code:
A
Abstract:

PURPOSE: To reduce the areas of source and drain impurity diffused layers by a method wherein the surfaces of the diffused layers are covered with a laminated film consisting of a polycrystalline silicon film and a titanium silicide film and a film consisting of a titanium silicide film and electrode holes are provided on these films.

CONSTITUTION: When a heat treatment is performed in inert gas, silicon and titanium react on each other on the surface of a gate electrode 6, exposed surfaces of source and drain impurity diffused layers 7 and the surfaces of polycrystalline silicon films 11 and titanium silicide films are formed. After that, unreacted titanium 12 left on element isolation regions 2 and walls 8b consisting of an insulating film is removed and titanium silicide films 13 are formed on the surface of the gate electrode 6, the exposed surfaces of the source and drain impurity diffused layers 7 and the surfaces of the polycrystalline silicon films 11 in a self-alignment manner. An insulating film 14 is deposited, electrode holes are opened and wirings 9 are formed. At this time, as the electrode holes to the layers 7 are provided on the silicon films 11, the areas of the layers 11 are reduced more than those of source and drain impurity diffused layers to be formed by a conventional technique and a junction capacitance between a single crystal silicon substrate and the layers 7 are decreased.


Inventors:
ABIKO HITOSHI
Application Number:
JP2887690A
Publication Date:
October 16, 1991
Filing Date:
February 07, 1990
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L21/336; H01L21/28; H01L29/78; (IPC1-7): H01L21/28; H01L21/336; H01L29/784
Attorney, Agent or Firm:
Uchihara Shin