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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH06342893
Kind Code:
A
Abstract:

PURPOSE: To provide a method for manufacturing a semiconductor device in which a leakage current between diffused layers for holding an element isolation insulating film is suppressed as much as possible even when high-voltage wiring layer is disposed at a fine interval on the insulating film and deteriorations of a connecting withstand voltage between a diffused layer and a substrate and a narrow channel effect are prevented.

CONSTITUTION: The method for manufacturing a semiconductor device comprises the steps of selectively forming an element isolation insulating film 13 on a surface of a semiconductor substrate, forming a plurality of wiring layers 16a, 16b on the insulating film along a direction perpendicular to an isolating width direction of the film 13, removing part of the film 13 existed between the wiring layers with the wiring layers as masks by etching, and implanting an impurity of the same conductivity type as that of the substrate for forming a channel stopper on a substrate exposed surface corresponding to the wiring layers from an opening removed by etching.


Inventors:
MORI SEIICHI
Application Number:
JP13205693A
Publication Date:
December 13, 1994
Filing Date:
June 02, 1993
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L21/76; H01L21/8247; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L27/115; H01L21/76; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Takehiko Suzue