PURPOSE: To provide a semiconductor device manufacturing method by which multilayer wiring can form by using a polishing method.

CONSTITUTION: After forming an A-1% Cu film 3 and plasma SiN layer 4 on the interlayer insulating film 2 of a silicon substrate 1 on which an integrated circuit is formed (Processes A and B) and forming a photoresist on the layer 4 (Process C), small-and large-area aluminum wiring 6 and 7 are formed by etching the layer 4 and film 3 (Process D). Then, after forming a plasma oxide film layer 8 (Process E), the substrate 1 is flattened by polishing the projecting part of the oxide film layer 8 under a pressure until the layer 4 is exposed (Process F). Thereafter, over-polishing is prevented and the in-plane uniformity of the flatness is improved by utilizing the difference in polishing speed between the oxide film layer 8 and SiN 4 and using the layer 4 as an over-polishing preventing film (Process G). Therefore, a completely flat interlayer insulating film which is free from over-polishing and flatness variation can be obtained.