Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5661138
Kind Code:
A
Abstract:
PURPOSE:To improve dielectric strength across collector and emitter by forming element isolation layers on an N type Si substrate wherein the layers are covered with a poly Si or amorphous Si film and the film is selectively converted into an SiO2 film after P layer formation and an N layer is provided by contacting the SiO2 film with the isolation layer. CONSTITUTION:Element isolation layers 2 are provided on an N type Si substrate 1 and the layers are covered with poly Si or amorphous Si 14 to form a P base layer 4 by B ion implantation. Next, an Si3N4 mask 15 is applied to cover the surfaces of an emitter region and the end section of the isolation layer 2. The layer 14 is selectively converted into SiO2 after thermal oxidation. An N emitter layer 3 is made by eliminating the mask 15 and by P ion implantation. In this composition, the gap between a base-collector junction and an emitter-base junction will not become narrow. Therefore, the dielectric strength across collector and emitter will be improved for walled emitter structure and reliability will be improved.
Inventors:
SATOU AKIRA
MONMA YOSHINOBU
MONMA YOSHINOBU
Application Number:
JP13688279A
Publication Date:
May 26, 1981
Filing Date:
October 23, 1979
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H01L21/76; H01L21/316; H01L21/331; H01L21/762; H01L29/73; (IPC1-7): H01L21/94; H01L27/06; H01L29/72
Domestic Patent References:
| JPS5380174A | 1978-07-15 |