MANUFACTURE OF SEMICONDUCTOR DEVICE

Japanese Patent JPS61244044

A

PURPOSE:To prevent a parasitic channel from generating by a method wherein an etching is performed on the element isolation regions using the oxide films and the masking material as masks to form the groove parts, an impurity is ion-implanted, insulating films are buried in the groove parts and an element is formed on the element forming region. CONSTITUTION:A P-type impurity 13 is ion-implanted in the surface of a silicon substrate 11 using a masking material 12 as a mask. Subsequently, an oxide film 14, for example, is deposited on the silicon substrate 11 and the masking material 12. After that, a dry etching is performed on the whole surface and parts of the oxide film 14 are left on the sidewall parts of the masking material 12. Then, an etching is performed on the silicon substrate 11 using the masking material 12 and the oxide films 14 as masks and groove parts 15 are formed in the element isolation regions. After the oxide films 14 are peeled off, an impurity 17 of the same conductive type as that of the substrate 11 is ion- implanted in the element isolation regions of the silicon substrate 11 using the masking material 12 as a mask. Insulating films 18 are buried in the groove parts 15 and the surface of the substrate is flattened by removing the masking material 12. Then, a gate oxide film 19 and a gate electrode 20 are formed.

JPS5762543	MANUFACTURE OF SEMICONDUCTOR DEVICE
JP2660972	PROBLEM TO BE SOLVED: To form a dish-shaped region in a high-density CMOS circuit.

ASAHINA IKUKO

JP8443185A

October 30, 1986

April 22, 1985

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TOSHIBA CORP

H01L21/76; (IPC1-7): H01L21/76

Noriyuki Noriyuki

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