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Title:
MANUFACTURE OF SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JPH05129606
Kind Code:
A
Abstract:

PURPOSE: To restrain deterioration of gate breakdown strength without thinning a film thickness of polysilicon of a gate electrode part by forming a gate electrode by laminating silicon-rich high-melting-point metal silicide on an upper layer of the polysilicon.

CONSTITUTION: A gate oxide film 2 is formed on a silicon substrate 1 by thermal oxidation and a polysilicon film 3 which is doped with impurities and a silicon-rich high-melting-point metal silicide film 4 are deposited one by one. Thereafter, the high melting point metal silicide film 4 and the polysilicon film 3 are patterned one by one by photolithography and etching to form a gate electrode. In the process, the metal silicide film 4 is formed to a composition of 2.3 to 2.8. Thereby, it is possible to supply silicon which is necessary to cause silicide reaction selfmatchingly not from polysilicon of the gate electrode but from metal silicide of an upper layer thereof by laminating high melting point metal on the upper layer and by carrying out heat treatment.


Inventors:
YONEKAWA KIYOTAKA
Application Number:
JP28999291A
Publication Date:
May 25, 1993
Filing Date:
November 06, 1991
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L29/78; (IPC1-7): H01L29/784
Attorney, Agent or Firm:
Toshiaki Suzuki



 
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