MANUFACTURE OF SEMICONDUCTOR SUBSTRATE

Title:

MANUFACTURE OF SEMICONDUCTOR SUBSTRATE

Document Type and Number:

Japanese Patent JPH05160089

Kind Code:

A

Abstract:

PURPOSE: To protect an SOI layer of two silicon wafers pasted together against contamination caused by the diffusion of impurity from a substrate and to enhance two wafers in adhesion to each other by a method wherein the two wafers are pasted together at a low temperature.

CONSTITUTION: SiO2 layers or BPSG layers 3 and 7 are formed on the surfaces of silicon wafers 1 and 5, and the surfaces of the BPSG layers 3 and 7 are polished and bonded together by thermocompression. BPSG layers 3 and 7 are used as layers interposed between two silicon wafers, whereby the silicon wafers can be bonded together at a low temperature of 900°C or so. The surface- polished BPSG layers 3 and 7 are thermally treated to be enhanced in surface smoothness and adhesive strength.

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Inventors:

HORIE HIROSHI
SUGIMOTO FUMITOSHI

Application Number:

JP32718891A

Publication Date:

June 25, 1993

Filing Date:

December 11, 1991

Export Citation:

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Assignee:

FUJITSU LTD

International Classes:

H01L21/02; H01L21/304; H01L21/316; H01L27/12; (IPC1-7): H01L21/02; H01L21/304; H01L21/316; H01L27/12

Attorney, Agent or Firm:

Teiichi

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