PURPOSE: To shorten a manufacturing process and make the lengths of the lightly-doped regions of source/drain regions constant.

CONSTITUTION: An insulating film 12 and a gate electrode film 4 are formed on a polycrystalline silicon film 2 formed on an insulating substrate 1 and a resist film 6 is formed on them. After the gate electrode film 4 is subjected to isotropic etching with the resist film 6 as a mask and a gate electrode 5 which has a smaller width than the resist film 6 is formed, the insulating film 12 is subjected to anisotropic etching to form a gate insulating film 3 which has a larger width than the gate electrode 5. After that, impurities such as phosphorus P are introduced into the polycrystalline silicon film 2 with the gate electrode 5 and the gate insulating film 3 as masks to form lightly-doped regions 8 in the parts which are masked by the gate insulating film 3 only and form heavily-doped regions 7 in the outside parts which are not masked. The number of times of photolithography is reduced to 4 and the number of times of impurity introduction is reduced to 1 and, further, the position relations between the gate electrode 5 and the heavily-doped region 7 and between the gate electrode 5 and the heavily-doped region 8 can be always constant.