強誘電性キャパシタおよび集積半導体メモリー用チップの製造方法

Title:

強誘電性キャパシタおよび集積半導体メモリー用チップの製造方法

Document Type and Number:

Japanese Patent JP3886907

Kind Code:

B2

Abstract:

The invention relates to a method for producing ferroelectric capacitors that are structured using the stack principle and that are used in integrated semiconductor memory chips. The individual capacitor modules have an oxygen barrier between a lower capacitor electrode and an electrically conductive plug. At a site where it is not covered by the corresponding oxygen barrier, an unstructured adhesive layer is oxidized by the oxygen arising during the tempering process of the ferroelectric and forms insulating segments at the site in such a way that the lower capacitor electrodes of the ferroelectric capacitors are electrically insulated from one another. This makes it possible to dispense with structuring the adhesive layer. Furthermore, the layer serves as a getter of oxygen and inhibits the diffusion of oxygen to the plug.

Inventors:

Casco, Igo
Cronke, matias
Micoragic, thomas

Application Number:

JP2002565350A

Publication Date:

February 28, 2007

Filing Date:

December 18, 2001

Export Citation:

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