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Title:
MANUFACTURING METHOD FOR OPTICAL INTEGRATED CIRCUIT WITH SPATIAL REFLECTION TYPE STRUCTURE AND OPTICAL INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP2002350665
Kind Code:
A
Abstract:

To provide a manufacturing method which can efficiently form an end surface and a sloped surface of an optical waveguide on a substrate with high precision for an optical integrated circuit having a spatial reflection type structure.

The manufacturing method for the optical integrated circuit includes a process of forming a 1st mask 3M for forming an end surface 3 on an optical waveguide 2 formed on a substrate 1, a process of forming a 2nd mask 4M for forming a sloped surface 4, and a process of forming the end surface 3 and the sloped surface 4 simultaneously by etching the respective masks 3M and 4M and the optical waveguide 2 by an RIE method, and the 1st mask 3M uses a mask material having properties different from properties of the 2nd mask 4M after the forming processes are completed and the influence on the 1st mask 3M of the processing carried out in the forming process of the 2nd mask becomes relatively small as compared with the influence on the 2nd mask 4M.


Inventors:
SHIBATA KOHEI
ISHIGAMI YUTAKA
SUZUKI KOJI
NOBUHARA HIROYUKI
NAKADA HIDEHIKO
Application Number:
JP2001162539A
Publication Date:
December 04, 2002
Filing Date:
May 30, 2001
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G02B6/13; G02B6/122; H01L31/0232; (IPC1-7): G02B6/13; G02B6/122; H01L31/0232
Attorney, Agent or Firm:
Fumio Sasashima