半導体装置の作製方法 - Semiconductor Energy Laboratory Co., Ltd.

Title:

半導体装置の作製方法

Document Type and Number:

Japanese Patent JP4907063

Kind Code:

B2

Abstract:

To provide a method for manufacturing a semiconductor device that can make an activity rate higher than before.

Plasma is produced over a semiconductor layer 3a by using raw material gas containing impurity elements and compensating gas containing an element as large as or larger than elements constituting the semiconductor device 3a to introduce impurity ions into the semiconductor layer 3a, and also introduce ions for defect formation composed of the element as large as or larger than the elements constituting the semiconductor layer into the semiconductor layer 3a for defect formation. Then the semiconductor layer 3a is heat-treated to activate the impurity ions. At this time, the semiconductor device 3a has a defect, so the activity rate of impurities is improved.

Inventors:

Junichi Koizuka
Terumasa Ikeyama
Koji Ohno

Application Number:

JP2004155015A

Publication Date:

March 28, 2012

Filing Date:

May 25, 2004

Export Citation:

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Assignee:

Semiconductor Energy Laboratory Co., Ltd.

International Classes:

G02F1/1368; H01L21/265; H01L21/20; H01L21/336; H01L29/786; H01L51/50; H05B33/14

Domestic Patent References:

JP7142421A
JP6318559A

Foreign References:

WO2003012844A1

Attorney, Agent or Firm:

Mutsumi Yanase
Atsushi Watanabe

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