Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP3621034
Kind Code:
B2
Abstract:
An improvement of the yield of semiconductor devices is achieved in the manufacture of a semiconductor device. The method includes forming a resin enclosure for block-molding a plurality of a semiconductor chips by placing a plurality of semiconductor chips inside a cavity of a molding die along with a substrate, and then injecting a resin from a first side to a second side of a main surface of the substrate. The plurality of semiconductor chips are mounted on the main surface of the substrate from the first side to the second side of the main surface with a predetermined spacing, the second side facing the first side. The method is characterized by the application of cleaning treatment to the main surface of the substrate before forming the resin enclosure.
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Inventors:
Masakatsu Goto
Norihiko Kasai
Norihiko Kasai
Application Number:
JP2000301952A
Publication Date:
February 16, 2005
Filing Date:
October 02, 2000
Export Citation:
Assignee:
Renesas Technology Corp.
Renesas Northern Japan Semiconductor Co., Ltd.
Renesas Northern Japan Semiconductor Co., Ltd.
International Classes:
H01L25/18; B29C45/14; H01L21/56; H01L25/065; H01L25/07; (IPC1-7): H01L21/56
Domestic Patent References:
JP2000025074A | ||||
JP2000012578A | ||||
JP62243627A | ||||
JP10270476A | ||||
JP8153742A | ||||
JP6151477A | ||||
JP6073167A | ||||
JP63128014U |
Attorney, Agent or Firm:
Akita Haruki