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Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4433324
Kind Code:
B2
Abstract:

To provide a method for manufacturing a semiconductor device by which a well contact of a transistor is easy to obtain.

This method for manufacturing the semiconductor device includes a step for forming a silicon layer 30 having a first region and a second region on an insulating layer 20, a step for doping the first region of the silicon layer 30 with impurities, a step for forming a thermally-oxidized film 16 on the surface of the silicon layer 30 after doping with the impurities, a step for removing the thermally-oxidized film 16, a step for forming a first field oxide film 41 so as to contact to the insulating layer 20 in the first region, a step for forming a second field oxide film 42 over the insulating layer 20 with the silicon layer 30 between in the second region, a step for forming a fully-depleted type transistor on the silicon layer 30 in the first region, and a step for forming a partially-depleted type transistor on the silicon layer 30 in the second region.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
Masahiro Yoshida
Application Number:
JP2007311920A
Publication Date:
March 17, 2010
Filing Date:
December 03, 2007
Export Citation:
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Assignee:
oki Semiconductor Co., Ltd.
International Classes:
H01L29/786; H01L21/8236; H01L21/8242; H01L27/08; H01L27/088; H01L27/108
Domestic Patent References:
JP2003124345A
JP8228145A
JP8330541A
JP9135030A
JP9260679A
JP11298001A
JP2001102442A