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Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4973109
Kind Code:
B2
Abstract:

To achieve a jointing part excellent in thermal resistance and thermal fatigue, and face-jointing a wiring conductor to a surface electrode of a semiconductor device and jointing the semiconductor device to a conductor substrate with high positional precision, using a soldering material free from lead.

A solder paste of a Sn3.5Ag0.5Cu particle (melting temperature: 220°C) is applied on the surface of a conductor substrate 12; and a semiconductor device 14 is placed thereon. A cream solder of mixed particles (solidus temperature: 220°C, liquidus temperature: 345°C) of a Sn20Ag20Cu0.4Ni powder and a Sn3.5Ag0.5Cu0.07Ni0.01Ge powder in the weight ratio of 62:35, is applied on a surface electrode of the semiconductor device 14; and a wiring conductor 16 is placed thereon. The resultant is heated at 250°C in this state to melt the solder paste of the Sn3.5Ag0.5Cu particle and to make the cream solder of a Sn14.2Ag13.2Cu0.28Ni0.035Ge in total composition into a solid-liquid coexistence state. Then, the resultant is cooled to joint the conductor substrate 12, the semiconductor device 14 and the wiring conductor 16 through the Sn3.5Ag0.5Cu jointing material 17 and the Sn14.2Ag13.2Cu0.28Ni0.035Ge jointing material 15.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
Mitsuo Yamashita
Application Number:
JP2006273527A
Publication Date:
July 11, 2012
Filing Date:
October 05, 2006
Export Citation:
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Assignee:
Fuji Electric Co., Ltd.
International Classes:
H01L23/48; B23K35/22
Domestic Patent References:
JP52127160A
JP6269981A
JP8139243A
JP9029480A
JP11186712A
JP2000343273A
JP2003245793A
JP2006287064A
JP2006512212A
JP3627591B2
Attorney, Agent or Firm:
Yoichi Matsumoto