MANUFACTURING METHOD OF SILICON CARBIDE SEMICONDUCTOR DEVICE

Japanese Patent JP2008294204

A

To prevent increase of on-resistance and the number of manufacturing processes while preventing thinning of a source region.

In an n+type source region 4 which is to be a base material, a region 4b to be oxidized is left lower in impurity concentration compared with a region 4a that is left unoxidized. With this setting, the accelerated oxidizing when the n+type source region 4 is oxidized can be suppressed during thermal oxidizing when forming a gate oxide film 7. Thus, increase of sheet resistance caused by thinning of the n+type source region 4 can be suppressed. Only adjustment of concentration at impurity ion implantation is required for forming the n+type source region 4, causing no difference from a conventional structure. So, with no increased on-resistance and the number of manufacturing processes, the effect like that can be obtained.

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KAWAHARA HIDEKI
OKUNO HIDEKAZU

JP2007137774A

December 04, 2008

May 24, 2007

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DENSO CORP

H01L29/12; H01L21/336; H01L29/78

JP2007281005A	2007-10-25
JP2000188399A	2000-07-04
JP2006173584A	2006-06-29
JP2007012684A	2007-01-18
JP2005012099A	2005-01-13
JP2002124669A	2002-04-26
JP2003309262A	2003-10-31

Yoji Ito
Takahiro Miura
Fumihiro Mizuno

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