Title:
MASTER SLICE TYPE INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS56138939
Kind Code:
A
Abstract:
PURPOSE:To improve the integrating density of a master silice type integrated circuit by varying the disposing state of conductor pieces or the like of common wiring pattern. CONSTITUTION:A plurality of longitudinal conductor pieces 13a (13a1-13a12) connected to an upper block row 111 and a plurality of longitudinal conductor pieces 13b (13b1-1312) connected to a lower block row 112 are confronted in the vicinity of the approximate center of a wire forming region 12 between the block rows 111 and 112. A plurality of longitudinal repeating conductor pieces 14 (141-144) electrically insulated from the blocks 111, 112 are disposed between the pieces 13a and 13b in desired array direction. A common wiring pattern is formed with the pieces 13a, 13b and the pieces 14. Further, the second layer wire 16 (161-168) becoming lateral wire and contact holes 17 are fomred, thereby forming an LSI connected with desired block.
More Like This:
Inventors:
YOSHIDA KENJI
Application Number:
JP4164580A
Publication Date:
October 29, 1981
Filing Date:
March 31, 1980
Export Citation:
Assignee:
CHO LSI GIJUTSU KENKYU KUMIAI
International Classes:
H01L21/822; H01L21/82; H01L27/04; H01L27/118; (IPC1-7): H01L27/04