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Title:
MAXIMUM VALUE DETECTOR
Document Type and Number:
Japanese Patent JP3106321
Kind Code:
B2
Abstract:

PURPOSE: To detect a maximum value suitable for making into an integrated circuit by detecting the maximum value from a lot of numerical values at extremely high speed and simultaneously using only the same element in the realizing means.
CONSTITUTION: Two numerical values are respectively inputted to two input layer block linear elements U01 and U02 of which the weight is '1', the weighting of '1' and '-1' is executed to the respective outputs of the elements U01 and U02 and the outputs are inputted together to a first intermediate layer block linear element U11. Further, the weighting of '0' and '1' is executed to the respective outputs of the elements U01 and U02 the outputs are inputted together to a second intermediate block linear element U12 and after executing the weighting of '1' to the outputs of the intermediate layer block linear elements U11 and U12 the outputs are inputted to a two-input output layer block linear element U21. Therefore among the two numerical values, the larger one is outputted from the output layer block linear element U21 On the other hand, it is also possible to simplify the configuration by removing the second intermediate block linear element U12 from the maximum value detector.


Inventors:
Kazuto Matsuo
Application Number:
JP19254191A
Publication Date:
November 06, 2000
Filing Date:
July 05, 1991
Export Citation:
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Assignee:
Toyo Communication Equipment Co., Ltd.
International Classes:
G06F15/18; G06G7/12; G06G7/60; G06N3/00; G06N99/00; (IPC1-7): G06G7/12; G06F15/18; G06G7/60
Domestic Patent References:
JP2181283A
JP4271459A
JP5876968A
JP63144618A