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Title:
MEMORY ACCESS PATH DIAGNOSTIC DEVICE
Document Type and Number:
Japanese Patent JPH02212954
Kind Code:
A
Abstract:

PURPOSE: To diagnose data transfer between a main storage device and a channel processor by detecting that the interruption frequency reaches is prescribed frequence during the idle state of an input/output processor, writing prescribed data in the main storage device, and afterwards, reading out this data, and comparing the data before write-in and after read-out.

CONSTITUTION: A means 33 to issue an interruption request to the input/output processor 32 at every prescribed time interval, and means 351 to accept the interruption request during the idle state of the input/output processor 32 and an interruption frequency detecting means 352 to detect that the accepted interruption reaches the prescribed frequency are provided. Further, a comparing means 353 which writes the prescribed data in the main storage device 4 and afterwards, reads out the written data, and compares the data before the write-in and the data after the readout when a prescribed number is detected from the interruption frequency detecting means 352 is provided. Thus, the normality of a memory access path can be diagnosed.


Inventors:
ISHIGAKI SHUICHIRO
Application Number:
JP3302889A
Publication Date:
August 24, 1990
Filing Date:
February 13, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/22; G06F13/00; (IPC1-7): G06F11/22; G06F13/00
Domestic Patent References:
JPS55127625A1980-10-02
JPS61127041A1986-06-14
Attorney, Agent or Firm:
Teiichi Ijiba (2 outside)



 
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