To prevent a CPU from entering a standby condition while eliminating the need to monitor a ready/busy signal outputted from a memory card when the CPU performs read/write operation.

A read command housed in a command housing register 160 and a read address is housed in an address housing register 105 from the CPU 301. When the CPU 301 writes a read start command in a control register 105, the read command and the read address are sequentially outputted to the memory card 303 and, once the ready/busy signal outputted from the memory card 303 after the output of the read address is changed into a ready signal, data are read from the memory card 303.