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Title:
MEMORY CONTROL METHOD AND DEVICE, PLOTTING PROCESSING METHOD AND DEVICE, VIDEO CONTROL METHOD AND DEVICE, BUFFER CONTROL METHOD AND DEVICE AND STORAGE MEDIUM
Document Type and Number:
Japanese Patent JP2000132453
Kind Code:
A
Abstract:

To provide a memory control method which can keep the drawing performance even for a printer of a multi-beam system by preparing a switching process to switch the width of an address that is updated by a memory access factor in a burst access mode.

When an access cycle is generated to a DRAM, a 1st selector 203 sends a row address and then a column address to the DRAM address. At the same time, a 2nd selector 204 is switched and the column address to be accessed next is stored in a latch 205 by an adder 206. Then the selector 203 sends out the column address stored in the latch 205 to increase the column addresses in burst mode. Then the width of an address that is updated by a memory access factor in a burst access mode is switched by both selectors 203 and 204.


Inventors:
MATSUI NOBUAKI
Application Number:
JP32144598A
Publication Date:
May 12, 2000
Filing Date:
October 27, 1998
Export Citation:
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Assignee:
CANON KK
International Classes:
G06F12/02; B41J5/30; G06T1/60; (IPC1-7): G06F12/02; B41J5/30; G06F12/02; G06T1/60
Attorney, Agent or Firm:
Toshihiko Watanabe



 
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