To provide a memory control system capable of unnecessitating the direct control of a write side by a read side at the time of executing speed conversion in a transmitter.

This memory control system is provided with a shift register part which shifts input data and an input type, a write control part which disables the specific part of the shift register part after detecting a type meaning a footer, and stops a write address to be supplied to a random access memory, a data latch part which shifts the data and type read from the random access memory, and a read control part which generates an end pulse indicating the end of data by detecting the type meaning the footer in the data latch part, and removes the footer, and generates a start pulse meaning the head of data by detecting a type meaning a header.