Title:
MEMORY CONTROLLER
Document Type and Number:
Japanese Patent JP2008226211
Kind Code:
A
Abstract:
To provide a technique to perform readout/write access to a memory at high speed.
A memory controller 4 can perform readout/write access to a memory 3 by hardware control of the memory controller 4 not by means of software control of a host system 1. The memory controller 4 can make the host system 1 and the memory 3 perform processing with a timing suitable for each characteristic by dissolving a handshake of the host system 1 and the memory 3. Consequently, the memory controller 4 can perform readout/write access at high speed.
Inventors:
SUGAWARA TAKAHIKO
Application Number:
JP2007070523A
Publication Date:
September 25, 2008
Filing Date:
March 19, 2007
Export Citation:
Assignee:
MEGACHIPS LSI SOLUTIONS INC
International Classes:
G06F12/00; G06F12/02
Domestic Patent References:
JPH11167514A | 1999-06-22 | |||
JP2006091940A | 2006-04-06 | |||
JP2002099349A | 2002-04-05 | |||
JP2003036202A | 2003-02-07 |
Attorney, Agent or Firm:
Go Sakane
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