PURPOSE: To reduce a memory cell holding current to make a RAM high-performance and low-power consumption, by adding a prescribed switch between the common power source bus and the power source of an FF.

CONSTITUTION: When a memory cell is stand-by, gate 6 and 7 connected to row decoder 9 are turned off, and gates 11 and 12, which are connected to column decoder 8, and MOS switch 22 are turned off. Consequently, information stored in FF1 is held by the current which is supplied from power source 4 to common power source 10 through high-resistance MOSFET21 for load. In this case, for example, the voltage of power source 10 is set to 5V, and the voltage of common power source bus 20 is lowered to 1.5V through FET21, thereby holding information of FF1. As the result, power consumption of FF1 can be reduced considerably.