To provide a memory management device capable of extending a life of a nonvolatile memory having an upper limit of the number of times of access.
The memory management device includes a means 21 for receiving write data written into a nonvolatile memory having an upper limit on the number of times of access and a logical address from a processor, a means 22 for determining whether to compress the write data based on specific information for which at least one of the type, the number of times of access, an access frequency, and an importance level of the write data is managed, a means 23 for compressing the write data when the write data are determined to be compressed, a means 24 for selecting a write area for the write data to be written into the nonvolatile memory, a means 25a for updating address translation information for making a physical address indicating the write area associated with the logical address, a means 25b for updating the specific information, and a means 26 for writing compressed write data into the write area of the nonvolatile memory when the write data are determined to be compressed, and writing uncompressed write data into the write area of the nonvolatile memory when the write data are determined not to be compressed.
MIYAGAWA MASANORI
KUNIMATSU ATSUSHI
TAKADA MARI
| JP2004227091A | 2004-08-12 | |||
| JP2009230513A | 2009-10-08 | |||
| JP2010518491A | 2010-05-27 | |||
| JP2008217772A | 2008-09-18 |
| WO2008095134A1 | 2008-08-07 |
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