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Title:
MEMORY PATCH METHOD FOR MULTIPROCESSOR SYSTEM
Document Type and Number:
Japanese Patent JPH03127252
Kind Code:
A
Abstract:

PURPOSE: To omit the necessity to always monitor the restart of a processor by loading the patch data into the memory of a relevant processor and restarting this processor if a processor requiring the application of a patch is included among those processors that undergone the IPL (initial program loading).

CONSTITUTION: When a desired patch to be applied to a memory only is pro duced, a maintenance console 6 rewrites the memory of the corresponding proces sor based on a command. Furthermore, the patch is registered into a patch control table 8. If an IPL control processor 1 detects a fault of a processor 3, for example, the processor 1 applies the IPL to the processor 3 and then refers to the table 8 after the end of the IPL. Thus, the processor 1 loads the patch data to the memory of the relevant processor and restarts this processor when a processor requiring the application of a patch is included among those processors that undergone the IPL. Thus, it is possible to always monitor the restart of the processor.


Inventors:
TOYODA SHINYA
Application Number:
JP26753489A
Publication Date:
May 30, 1991
Filing Date:
October 13, 1989
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F15/16; G06F9/445; G06F13/00; G06F15/177; (IPC1-7): G06F9/445; G06F13/00; G06F15/16
Attorney, Agent or Firm:
Toshi Inoguchi