仮想メモリのメモリプリフェッチ

Title:

仮想メモリのメモリプリフェッチ

Document Type and Number:

Japanese Patent JP6971264

Kind Code:

B2

Abstract:

Virtual memory pre-fetch requests are generated for a virtual memory and a multiple port memory management unit (MMU) circuit. Virtual memory access requests sent to a particular port of the MMU circuit are monitored. In response to the satisfaction of a trigger condition, virtual memory pre-fetch requests are generated and transmitted to the MMU circuit using the particular port. Physical access requests from the MMU circuit are monitored for physical addresses corresponding to the virtual memory pre-fetch requests. The physical access requests corresponding to the virtual memory pre-fetch requests are filtered.

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Inventors:

Kumar, Bharat
Azad, Saloch Eye

Application Number:

JP2018561706A

Publication Date:

November 24, 2021

Filing Date:

May 19, 2017

Export Citation:

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Assignee:

XILINX INCORPORATED

International Classes:

G06F12/0862; G06F12/1027

Domestic Patent References:

JP2014507042A
JP2014175017A
JP7152654A
JP2006018474A
JP11238015A

Foreign References:

US20150082000
US20130227245

Attorney, Agent or Firm:

Fukami patent office

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