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Title:
MEMORY PROTECT SYSTEM
Document Type and Number:
Japanese Patent JPS5956300
Kind Code:
A
Abstract:

PURPOSE: To prevent the destruction of stored contents due to a program runaway and change system data from a remote place, by outputting an input key code to a specified output port as it is and providing a means which releases memory protection only when this code coincides with a fixed key code.

CONSTITUTION: Normally, the write from a CPU (a) to an RAM (f) is inhibited by a protector (d), and the RAM (f) is in a memory protection state. In case that system data in the RAM (f) is changed or new system data is set, a command to release the memory protection is inputted from a typewriter (c) to the CPU (a) through a typewriter interface (b). The CPU (a) outputs the key code included in this command to the protector (d) as it is (without processing it). The protector (d) latches the key code and compares it with the fixed key code from a fixed key code setting means (e); and when they coincide with each other, the write suppression of the write control line of the RAM (f) is released.


Inventors:
TOMINAGA YOSHINOBU
SATOU MITSUO
IKEDA NORIHITO
OOUCHI KAZUYUKI
MORI YOSHITOSHI
KUROMORI HIROSHI
Application Number:
JP16558982A
Publication Date:
March 31, 1984
Filing Date:
September 22, 1982
Export Citation:
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Assignee:
MEISEI ELECTRIC CO LTD
ANRITSU ELECTRIC CO LTD
HASEGAWA DENKI SEISAKUSHO
NAKAYO TELECOMMUNICATIONS
TAKAMISAWA ELECTRIC CO
TAIKO ELECTRIC WORKS LTD
International Classes:
G06F12/14; G06F11/00; G06F11/07; G06F21/62; (IPC1-7): G06F13/00; G11C29/00
Domestic Patent References:
JPS55130000A1980-10-08
Attorney, Agent or Firm:
Teruo Taniyama