Title:
メモリスタに基づくニューラルネットワークの並列加速方法およびプロセッサ、装置
Document Type and Number:
Japanese Patent JP7399517
Kind Code:
B2
Abstract:
Disclosed are a parallel acceleration method for a memristor-based neural network, a parallel acceleration processor based on a memristor-based neural network and a parallel acceleration device based on a memristor-based neural network. The neural network includes a plurality of functional layers sequentially provided, wherein the plurality of functional layers include a first functional layer and a second functional layer following the first functional layer, the first functional layer includes a plurality of first memristor arrays in parallel, and the plurality of first memristor arrays are configured to execute an operation of the first functional layer in parallel and to output a result of the operation to the second functional layer. The parallel acceleration method includes: executing the operation of the first functional layer in parallel via the plurality of first memristor arrays and outputting the result of the operation to the second functional layer.
Inventors:
▲呉▼ ▲華▼▲強▼
姚 ▲鵬▼
高 ▲浜▼
▲銭▼ ▲鶴▼
姚 ▲鵬▼
高 ▲浜▼
▲銭▼ ▲鶴▼
Application Number:
JP2022526246A
Publication Date:
December 18, 2023
Filing Date:
January 10, 2020
Export Citation:
Assignee:
Tsinghua University
International Classes:
G06G7/60; G06G7/14; G06G7/16; G06N3/063; G11C11/54; G11C13/00; H10B63/00; H10B63/10
Domestic Patent References:
| JP2018200627A | ||||
| JP2266458A | ||||
| JP2019153254A |
Foreign References:
| US20140180989 | ||||
| US20180157969 |
Attorney, Agent or Firm:
Yasuhiko Murayama
Shinya Mihiro
Tatsuhiko Abe
Shinya Mihiro
Tatsuhiko Abe