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Patent Searching and Data


Title:
METALLIZATION FOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS5875869
Kind Code:
A
Abstract:
Aluminium metallisation layers on a semiconductor substrate (15) are alloyed with a predetermined quantity of silicon by implanting silicon ions into the metallisation layer. The layer is heated during subsequent processing to a temperature of 300 to 500 DEG C at which simultaneous annealing and diffusion take place to form the alloy. An apparatus for performing the process comprising a vacuum chamber (11) wherein implantation is effected, an ion gun (19) and means including a deflection magnet slit (23) for selecting a single ionic species for implantation.

Inventors:
RUDORUFU OOGASUTO HAABAATO HAI
Application Number:
JP17471682A
Publication Date:
May 07, 1983
Filing Date:
October 06, 1982
Export Citation:
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Assignee:
ITT
International Classes:
H01L21/3205; C23C14/48; H01L21/28; H01L21/285; H01L21/3215; H01L23/52; H01L29/43; (IPC1-7): H01L21/28; H01L21/88; H01L29/46
Domestic Patent References:
JPS5024080A1975-03-14
JPS5247371A1977-04-15
JPS5667942A1981-06-08
JPS5667941A1981-06-08
Attorney, Agent or Firm:
Takehiko Suzue