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Title:
METHOD FOR CONTROLLING RE-EXECUTION IN THE CASE OF MEMORY ERROR
Document Type and Number:
Japanese Patent JPH076098
Kind Code:
A
Abstract:

PURPOSE: To improve the reliability of a memory, minimize a decrease in throughput for the reliability improvement, and speed up processing by keeping a microprocessor in reading operation for the memory if data read out of the memory become abnormal, and ending the reading operation for the memory once by a memory control circuit and performing the reading operation again.

CONSTITUTION: This method is provided with the memory control circuit 2 which checks the normalcy of the data read out of the memory 3 when a microprocessor 1 reads the data out of the memory 3. Then if the data are abnormal, the memory control circuit 2 holds the microprocessor 3 in the reading operation while the reading of the memory 3 is ended once and performed again. Further, the memory control circuit 2 does not send out a response for ending the reading operation by the microprocessor 1 to the microprocessor if the data are abnormal.


Inventors:
BABA HIROYUKI
SUZUKI TATSUMI
Application Number:
JP17091393A
Publication Date:
January 10, 1995
Filing Date:
June 18, 1993
Export Citation:
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Assignee:
HITACHI TELECOMM TECH
International Classes:
G06F11/14; G06F12/16; (IPC1-7): G06F12/16; G06F11/14
Attorney, Agent or Firm:
Teruo Aoki