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Title:
METHOD OF DIFFUSING IMPURITY IN SEMICONDUCTOR
Document Type and Number:
Japanese Patent JPH027516
Kind Code:
A
Abstract:

PURPOSE: To form a diffused layer having a required thickness in a high temperature state and in a short time and void contamination caused by heavy metal ions by a method wherein, after a semiconductor substrate is covered with a silicon nitride film with an oxide film between, the substrate is subjected to a high temperature treatment for thermal diffusion.

CONSTITUTION: A thermal oxide film 24 is formed over the whole surface of an N-type Si single crystal substrate 20 in which a boron deposited layer 22 is formed and the whole surface is coated with a silicon nitride film 26. The semiconductor substrates W prepared by such pretreatment are arranged on an SiC board 14 and inserted into an SiC tube 12 and an electric furnace 10 is driven to heat the substrates W at a high temperature not lower than about 1200°C. For instance, if the heating temperature, i.e. a thermal diffusion temperature, is 1250°C, a diffused layer 28 having a thickness about 8-10μm is formed in about 6 hours. However, if the Si single crystal substrate 20 is covered with the silicon nitride film 26 with the oxide film 24 between, even if the substrate is heated at about 1200°C for several tens of hours, heavy metal ions do not reach the inside of the Si single crystal.


Inventors:
HOSHINO SHIGEO
Application Number:
JP15831888A
Publication Date:
January 11, 1990
Filing Date:
June 27, 1988
Export Citation:
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Assignee:
NISSAN MOTOR
International Classes:
H01L21/22; H01L21/265; (IPC1-7): H01L21/22; H01L21/265
Attorney, Agent or Firm:
Shigenori Wada



 
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