To discriminate a circuit state and to improve the testability of a sequential circuit design by estimating connection line establishments for respective couples of flip-flops of a circuit and comparing the estimated values of the establishment with a previously selected threshold value.

An input stimulus generated by a test generator 11 is applied to a main input (primary input) 14 of a circuit 12 and an output response as its result is measured on a main output (primary output) 15. The output response as the result is compared by a comparing circuit 16 with an expected output response, and consequently a fault example of the circuit is discriminated. Further, a set of at least two flip-flops is divided into groups of flip-flops. The input stimulus generated by the test generator 11 places the circuit in test mode and further operates the 'enable' main input (primary input) to enable an independent clock as to the flip-flops as determined by a test generating process.