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Title:
METHOD FOR INSPECTING LAMINATED CHIP TYPE ELECTRONIC PART
Document Type and Number:
Japanese Patent JP2003297659
Kind Code:
A
Abstract:

To provide a method for inspecting a laminated chip type electronic part capable of confirming a disconnection position of an internal electrode easily and promptly.

A chip part 1 is installed in a sample chamber 13a inside a shield 13 in the state of directing a plane exposing the internal electrode by grinding upward, and a first external electrode 2 of the chip part 1 is connected to a detector 19 and a second external electrode 3 is connected to a ground. Upon making the inside of the sample chamber 13a substantially in a vacuum, focused electron beam BM is irradiated on an exposed plane of the internal electrode of the chip part 1. When the electron beam BM are irradiated on a side of the first external electrode 2 rather than the disconnection position, a current flows in the detector 19, which outputs a signal. Thus, from an irradiation position of the electron beam BM and the output signal of the detector 19, the disconnection position of the internal electrode of the chip part 1 can be specified.


Inventors:
SHIGA MOTOTSUGU
Application Number:
JP2002103869A
Publication Date:
October 17, 2003
Filing Date:
April 05, 2002
Export Citation:
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Assignee:
TOKO INC
International Classes:
H01F41/00; H01G13/00; (IPC1-7): H01F41/00; H01G13/00
Attorney, Agent or Firm:
Yu Ota