Title:
METHOD FOR INSPECTING SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP3878243
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To detect and select completely a defective or deteriorated memory cell by tentatively changing a reference voltage in a chip externally and detecting and evaluating read information.
SOLUTION: An in-chip reference voltage VDC changed tentatively is used for inspecting the memory device. The reference voltage VDC is supplied as a preliminary changing potential for a dummy memory cell DMC and the preliminary changing potential is give to a memory capacitor DC via an balancing device EQLDC and other electrode is connected to a plate potential VPL. Furthermore, the preliminary charging potential VDC is given to a capacitor CC of a redundancy cell CMC and the plate potential VPL is give to the other electrode. Thus, the operation and the load state of read amplifiers SA in the case of evaluation and amplification of read data are changed symmetrically in an excellent way.
Inventors:
Johann Leeger
Thomas Huon der Ropp
Thomas Huon der Ropp
Application Number:
JP8092496A
Publication Date:
February 07, 2007
Filing Date:
March 08, 1996
Export Citation:
Assignee:
Siemens Aktiengesellschaft
International Classes:
G11C11/401; G11C29/00; G11C29/56; G11C29/50; (IPC1-7): G11C29/00; G11C11/401
Domestic Patent References:
| JP5144296A | ||||
| JP6303123A |
Attorney, Agent or Firm:
Iwao Yamaguchi
Previous Patent: DIGITAL CATV SYSTEM AND ITS TRANSMISSION/RECEPTION METHOD
Next Patent: PRODUCTION OF CARBON-CONTAINING REFRACTORY
Next Patent: PRODUCTION OF CARBON-CONTAINING REFRACTORY