METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Title:

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Document Type and Number:

Japanese Patent JP2007306016

Kind Code:

A

Abstract:

To provide a method for manufacturing a semiconductor device, which narrows a width of a gate electrode without inhibiting a reduction of a resistance of silicide in the semiconductor device.

A poly-silicon film 4 is formed on the entire face of a surface region of a silicon semiconductor substrate 1, and this poly-silicon film 4 is patterned so that a line width of a poly-silicon film 4' in a field oxide film 2 is made larger than a line width of the poly-silicon film 4 in an element forming region. Subsequently, on the poly-silicon films 4, 4' of a first layer prescribing a gate width of a MOSFET and on a sidewall SiN film 6, the poly-silicon films of a second layer wider than the poly-silicon films 4, 4' are formed through a SiO2 film 8, and the poly-silicon films of the second layer are silicified to form a titanium silicide layer 12.

Inventors:

TANAKA AKIHIKO

Application Number:

JP2007161437A

Publication Date:

November 22, 2007

Filing Date:

June 19, 2007

Export Citation:

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Assignee:

TEXAS INSTRUMENTS JAPAN

International Classes:

H01L21/28; H01L21/3205; H01L21/336; H01L21/8238; H01L23/52; H01L27/092; H01L29/423; H01L29/49; H01L29/78

Domestic Patent References:

JPH09199714A	1997-07-31
JPH07202184A	1995-08-04
JPH04259255A	1992-09-14
JPH08264771A	1996-10-11
JPH04274362A	1992-09-30
JPH09199717A	1997-07-31

Foreign References:

WO1997023902A2

1997-07-03

Attorney, Agent or Firm:

Filial piety Sasaki

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