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Title:
METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JP2002057124
Kind Code:
A
Abstract:

To provide a method of manufacturing a semiconductor element with which sheet resistance characteristic and thermal stability of a metal silicide can be improved.

A first polysilicon layer 23 is formed on a gate insulating film 22 formed on a semiconductor substrate 21. A SiN layer 24 is formed on the first polysilicon layer 23 by implanting nitrogen. On the SiN layer 24, a second polysilicon layer 25 is formed. The semiconductor substrate, wherein a refractory metal film 26 is formed on the second polysilicon layer, is heat-treated to make the secondary polysilicon layer 25 react with the refractory metal film 26 to form a metal silicide film 27. By forming the SiN layer 24, the secondary polysilicon layer 25 and the first polysilicon layer 23 are made mutually independent, and the amorphous second polysilicon layer 25 is not affected by the crystalline grains of the first polysilicon layer 23 during the heat treatment for forming the metal silicide film 27.


Inventors:
HO GENSHUN
Application Number:
JP2001119558A
Publication Date:
February 22, 2002
Filing Date:
April 18, 2001
Export Citation:
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Assignee:
HYNIX SEMICONDUCTOR INC
International Classes:
H01L21/28; H01L21/3205; H01L23/52; H01L29/78; (IPC1-7): H01L21/28; H01L21/3205; H01L29/78
Domestic Patent References:
JPH05291567A1993-11-05
JPH11103047A1999-04-13
JPH06163457A1994-06-10
JPH10125617A1998-05-15
JPH1012744A1998-01-16
JPH11312803A1999-11-09
JPH01251757A1989-10-06
JPH11274097A1999-10-08
Attorney, Agent or Firm:
Fumio Sasashima (1 person outside)