Title:
METHOD OF RECORDING SEMICONDUCTOR CHIP POSITION
Document Type and Number:
Japanese Patent JPH10209006
Kind Code:
A
Abstract:
To provide a method of recording the position data of all semiconductor chips on a substrate whereby the position data is readable from terminals even after assembling them in a package.
Photo resist windows 117 for defining impurity introducing regions are overlapped with part of mutually 90% inclined polycrystal Si resistor 116. The overlapped area varies, depending on the exposing position in a wafer plane. A polycrystal Si resistor pattern for recording the semiconductor chip position is previously formed on a chip of a reduction aligner to thereby record the semiconductor chip position on an exposed wafer.
Inventors:
YAMADA YOSHIYUKI
Application Number:
JP841997A
Publication Date:
August 07, 1998
Filing Date:
January 21, 1997
Export Citation:
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L21/027; (IPC1-7): H01L21/027
Attorney, Agent or Firm:
Mamoru Shimizu (1 person outside)
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