Title:
コンピュータ・システムのI/O電力を低減するための方法及び装置、並びにコンピュータ・システム
Document Type and Number:
Japanese Patent JP5255061
Kind Code:
B2
Abstract:
The present invention provides a method and an apparatus for lowering I/O power of a computer system and a computer system. According to an aspect of the present invention, there is provided a method for lowering I/O power of a computer system, comprising: buffering a plurality of ways of data to be sent to a bus; encoding each of the plurality of ways of data buffered from n bits to n+m bits based on an encoding rule, wherein n and m are both an integer larger than or equal to 1, the encoding rule is used to lower code switching frequency; and sending the plurality of ways of data encoded to the bus.
Inventors:
Shen, Wenbo
Lee, you
One, yanchi
Yang, Yu Dong
Lee, you
One, yanchi
Yang, Yu Dong
Application Number:
JP2010529216A
Publication Date:
August 07, 2013
Filing Date:
October 10, 2008
Export Citation:
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
International Classes:
G06F13/40; G06F3/00; G06F5/00; G06F13/28
Domestic Patent References:
| JP2002141808A | ||||
| JP2002202833A | ||||
| JP2001086106A | ||||
| JP2002202947A | ||||
| JP2007257415A | ||||
| JP2005025805A | ||||
| JP2007052714A |
Foreign References:
| US20040225945 | ||||
| US20070300121 |
Attorney, Agent or Firm:
Takeshi Ueno
Tasaichi Tanae
Yoshihiro City
Tasaichi Tanae
Yoshihiro City