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Title:
トーラス区画化を容易にするために並列コンピュータのプロセッサを相互接続する方法およびシステム
Document Type and Number:
Japanese Patent JP3982634
Kind Code:
B2
Abstract:
The present invention provides a method and system of interconnecting L processors of a parallel computer to facilitate torus partitioning, (a) where each of the processors includes a processing unit and a switch, (b) where the switch includes a first external port, a second external port, a third external port, a fourth external port, a first internal port, and a second internal port, (c) where the L processors comprise R non-overlapping partitions, (d) where each of the partitions comprises the processing unit of at least one of the processors, and (e) where L is an integer >=2 and R is an integer >=1. In an exemplary embodiment, the method and system include connecting the L switches of the L processors among the external ports of the L switches in an extended torus architecture and setting the connected L switches thereby interconnecting each of the partitions as a torus.

Inventors:
Larry Jay Stockmeyer
Application Number:
JP2004298359A
Publication Date:
September 26, 2007
Filing Date:
October 13, 2004
Export Citation:
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Assignee:
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
G06F15/173; G06F15/00; G06F15/163; G06F15/177; G06F15/80
Domestic Patent References:
JP6290158A
JP10134007A
Attorney, Agent or Firm:
Hiroshi Sakaguchi
Yoshihiro City
Takeshi Ueno