Title:
MICROCOMPUTER EXTERNAL DEVICE SELECTING SYSTEM
Document Type and Number:
Japanese Patent JPS5469351
Kind Code:
A
Abstract:
PURPOSE:To enable to connect dirctly I/O interface circuits to signal buses such as ROM and RAM to simplify the constitution of devices by selecting the external devuces in the same form as write and read instructions of the memory. CONSTITUTION:Input interface circuits 11 and 12 and output interface circuits 13 and 14 are directly connected to signal bus 10 which connects among CPU1, ROM2 and RAM3. When circuits 11 and 13 are selected in the same manner with chip selection of the memory, CPU 1 outputs a memory read instruction in the same manner with that for ROM2 and ROM3. By decoding the chip selection part of the read instruction, one of chip select lines 104 which are set according to respective chips becomes H and corresponding circuit 11 is selected.
Inventors:
HOSAKA MASAO
OGINO YOSHITAKA
OGINO YOSHITAKA
Application Number:
JP13681877A
Publication Date:
June 04, 1979
Filing Date:
November 15, 1977
Export Citation:
Assignee:
RICOH KK
International Classes:
G06F13/14; G06F3/00; G06F12/06; G06F15/00; G06F15/78; G11C8/00; (IPC1-7): G06F3/00; G06F15/00; G11C8/00