Title:
MICROPROCESSOR REMOTE RESET SYSTEM
Document Type and Number:
Japanese Patent JP2541492
Kind Code:
B2
Abstract:
PURPOSE: To perform remote reset of a microprocessor connected by a communication channel.
CONSTITUTION: Data communication is performed between a master station (14) and plural slave stations (S1-Sn) with a polling system, and the master station is constituted of the microprocessor(MPU) 1 and an SIO 2 which performs transmission/reception processing, and each slave station is constituted of a line data monitoring part 3 which monitors data on a line, a delay part 4 which delays a reset signal outputted from the line data monitoring part 3 for fixed time, and a judging part 5 which carries judgement from the output of the delay part 4 and a reset prohibition signal outputted from the MPU 7 of the slave station, and outputs the reset signal to the MPU 7 based on a judged result.
Inventors:
TAKAHASHI AKIHIKO
Application Number:
JP31380193A
Publication Date:
October 09, 1996
Filing Date:
December 14, 1993
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F11/30; G06F1/24; G06F13/00; G06F15/00; (IPC1-7): G06F13/00; G06F1/24; G06F11/30; G06F15/00
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)