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Title:
MICROPROGRAM CONTROL UNIT
Document Type and Number:
Japanese Patent JPS55119747
Kind Code:
A
Abstract:

PURPOSE: To enable multi-branch without limit of the branched address set, by storing the branched address to a plurality of buffer registers in advance and selecting one of a plurality of buffer registers with the branch conditions.

CONSTITUTION: The micro instruction memory unit 10 stores the micro instruction, the address is stored to the address register 70, this address is stored 60 and the micro instruction from the unit 10 is stored in the control register 20. A part of the micro instruction of the register 20 is stored in the buffer registers 30, 31, and 32, and the content and either one of the branch address of the register 20 are selected 40 with the test result of the test circuit or the micro instruction of the register 20, and the content of the circuit 40 and the register 70 is selected 50 with the test result of the circuit 90 or micro instruction of the register 20. Thus, without limit to the set of the branched address, multi-branching can be made.


Inventors:
TAKANE HISAO
Application Number:
JP2705979A
Publication Date:
September 13, 1980
Filing Date:
March 08, 1979
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F9/28; G06F9/22; G06F9/26; G06F9/32; (IPC1-7): G06F9/26; G06F9/32



 
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