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Patent Searching and Data


Title:
MOIRE IMPROVING CIRCUIT
Document Type and Number:
Japanese Patent JPH05260337
Kind Code:
A
Abstract:

PURPOSE: To improve the horizontal moires in particular by attaining the improvement of moires with no deterioration of the image quality.

CONSTITUTION: A moire correcting circuit 4 produces a sine wave having the frequency of an odd multiple of 1/2 fV (vertical scan frequency) synchronously with the fV received from a vertical deflecting circuit 2 and superimposes the sine wave on the horizontal synchronizing signal of a horizontal phase circuit contained in a horizontal deflection circuit 3. The horizontally deflected current flowing to a CRT is slightly modulated based on the sine wave. Thus the position of an image is varied on the CRT 1. As a result, the moire stripes caused in the horizontal direction can be visually erased.


Inventors:
Yamanaka Hideo
Application Number:
JP5388292A
Publication Date:
October 08, 1993
Filing Date:
March 12, 1992
Export Citation:
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Assignee:
Toshiba Corporation
Toshiba Abu E Co., Ltd.
International Classes:
H04N3/30; H04N9/18; (IPC1-7): H04N3/30; H04N9/18
Attorney, Agent or Firm:
Susumu Ito