PURPOSE: To avoid the action of a protection circuit by a small input voltage by the prevention of the punch-through between the source and the drain in the title circuit equipped with an input protection circuit.

CONSTITUTION: A thermal oxide film 2 is grown on P type Si substrate 1, next the substrate is exposed by the selective etching of the regions serving as the source-drain and the contact part, and then deep low resistance regions 3 doped with phosphorus with a high concentration are formed. Then, the region serving as the gate and the region forming the input resistor are selectively etched, and a gate oxide film 4 is grown on the exposed substrate surface. After the whole evaporation of aluminum 5, the gate electrode is formed. Thereafter, a high resistant diffused layer 6 is shallowly provided in self-alignment by phosphorus ion implantation, and then connected to the N+ diffused layer 3. A resistor 7 is formed at the same time during the ion implantation. A shallow high resistant layer 3 is formed on both sides of an MOS transistor gate, and there is less exudation of impurity downward the gate.