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Title:
MOS MULTIPLYING CIRCUIT AND FREQUENCY MIXER CIRCUIT
Document Type and Number:
Japanese Patent JP2000082105
Kind Code:
A
Abstract:

To provide a MOS multiplying circuit which does not need a differential input voltage and is appropriate to an integrated circuit by making a difference current between an output current flowing a second shared output terminal and an output current flowing a first shared output terminal an output current.

A drain of a MOS transistor M3 connected to the connection point of MOS transistors M1 and M2 is commonly connected to a drain of a MOS transistor M6 connected to the connection point of MOS transistors M4 and M5. The drain of a MOS transistor M9 connected to the connection point of MOS transistors M7 and M8 is commonly connected to the drain of a MOS transistor M12 connected to the connection point of MOS transistors M10 and M11. Then, for example, a difference current output circuit 101 composed of a current mirror circuit takes out, as an output current, a difference current Δ1 which is obtained by subtracting the sum current of the drain current of the MOS transistors M3 and M6 from the sum current of the drain current of the MOS transistors M9 and M12.


Inventors:
KIMURA KATSUHARU
Application Number:
JP25025798A
Publication Date:
March 21, 2000
Filing Date:
September 04, 1998
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06G7/163; H03D7/12; H03F3/16; H03G11/08; (IPC1-7): G06G7/163; H03D7/12; H03F3/16; H03G11/08
Attorney, Agent or Firm:
Asato Kato