Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MOS TYPE SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS63182865
Kind Code:
A
Abstract:

PURPOSE: To secure bonding of a lead wire, by interposing an insulating layer between a gate electrode and a metallic layer, which are disposed on an oxidizing film formed on a surface of a semiconductor substrate, and making this metallic layer penetrate into an insulating layer on the lateral of a gate pad and electrically continue to the electrode.

CONSTITUTION: A MOS type semiconductor device 1 is provided with a semiconductor substrate 2 which has a drain region 3, a source region 4, and a channel formation region 5. An oxidizing film 6 is formed on a surface of the semiconductor substrate 2, and a gate electrode 7 is formed on this oxidizing film 6. A gate pad part GP of the gate electrode 7 is connected with a lead wire GP. The gate pad part GP is composed of the following two layers; one is an aluminium layer 18 for connection of the lead wire GL and the other is an insulating layer interposed between this aluminium layer 18 and the gate electrode 7. The aluminium layer 18 penetrates into an insulating layer 17 on the lateral of the gate pad part GP and advances to electrically continue to the gate electrode 7.


Inventors:
NOBE TAKESHI
SUZUMURA MASAHIKO
AKIYAMA SHIGEO
Application Number:
JP1440087A
Publication Date:
July 28, 1988
Filing Date:
January 24, 1987
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRIC WORKS LTD
International Classes:
H01L29/78; (IPC1-7): H01L29/78
Attorney, Agent or Firm:
Takehiko Matsumoto



 
Previous Patent: JPS63182864

Next Patent: JPS63182866