Title:
MULTI-ELECTRONIC DEVICE PACKAGE
Document Type and Number:
Japanese Patent JP2878243
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a multi-electronic device package having more increased chip density, lower total profile and larger heat radiating performance than the multi-chip module structure of the prior art.
SOLUTION: This package 10 includes a heat transfer and electric conductive plane 30 provided between a first substrate 12 and a second substrate 22. A first electronic device 36 is fitted to the first surface 32 of the plane in an aperture 18 of the first substrate 12, while the second electronic device 40 is fitted to the second surface 34 of the plane in the aperture 28 of the second substrate 22. This package has the solder balls 66, 68, 70, 72, 74, 76 provided on the second substrate 22 in order to electrically connect and physically mount this package on the third circuit substrate and also the solder balls 90, 92, 94, 96, 98, 100 provided on the first substrate 12 for electrically connecting and physically mounting the electronic device on the second electronic device 10' of the laminated structure.
Inventors:
JOSEFU MAIKERU RONDA
Application Number:
JP18147497A
Publication Date:
April 05, 1999
Filing Date:
July 07, 1997
Export Citation:
Assignee:
INTAANASHONARU BIJINESU MASHIINZU CORP
International Classes:
H01L25/18; H01L23/31; H01L25/065; H01L25/07; H01L25/10; H01L25/11; (IPC1-7): H01L25/065; H01L25/07; H01L25/18
Attorney, Agent or Firm:
Hiroshi Sakaguchi (1 person outside)
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