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Title:
MULTI-FRAME SYNCHRONIZING CIRCUIT
Document Type and Number:
Japanese Patent JPH01258516
Kind Code:
A
Abstract:

PURPOSE: To obtain a circuit to save the waste of a forward protecting time to take to decide a pull out condition by adding a generated frame pull out condition signal to a multi-frame synchronization protection circuit.

CONSTITUTION: When the pull out condition is decided by a multi-frame synchronization protection circuit 5 and a pull out condition signal (i) is outputted, a gate circuit 7 is closed, a counting pulse (d) is prohibited and the counter of a multi-frame counter circuit 3 is stopped. A selecting circuit 6 becomes the wait condition of a multi-pulse signal (e). When the signal (e) is detected by the multi-frame pulse detecting circuit 3 again, the circuit 3 is reset, a coincident pulse signal (g) is added from a coincidence detecting circuit 4 to the circuit 5, the circuit 7 is opened and the counting of the circuit 3 is restarted. The circuit 6 selects a reference pulse signal (f) from the circuit 3 and addes a resetting signal (j) to the circuit 3 for one multi-frame.


Inventors:
KOSUDA SHINICHI
Application Number:
JP8634088A
Publication Date:
October 16, 1989
Filing Date:
April 08, 1988
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H04J3/06; H04L7/08; (IPC1-7): H04J3/06; H04L7/08
Attorney, Agent or Firm:
Masuo Oiwa (2 outside)



 
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